The Mitsubishi D10V version of
as has a few machine
aswill attempt to optimize its output by detecting when instructions can be executed in parallel.
aswill sometimes swap the order of instructions. Normally this generates a warning. When this option is used, no warning will be generated when instructions are swapped.
The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.
The D10V version of
as uses the instruction names in the D10V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form?
as will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either `.s' (short) or `.l' (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write `bra.s foo'.
Objdump and GDB will always append `.s' or `.l' to instructions which
have both short and long forms.
The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.
If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.
`;' and `#' are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially. To specify the executing order, use the following symbols:
The D10V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example
abs a1 -> abs r0
abs r0 <- abs a1
ld2w r2,@r8+ || mac a0,r0,r7
ld2w r2,@r8+ ||
ld2w r2,@r8+ ->
Since `$' has no special meaning, you may use it in symbol names.
You can use the predefined symbols `r0' through `r15' to refer to the D10V registers. You can also use `sp' as an alias for `r15'. The accumulators are `a0' and `a1'. There are special register-pair names that may optionally be used in opcodes that require even-numbered registers. Register names are not case sensitive.
The D10V also has predefined symbols for these control registers and status bits:
as understands the following addressing modes for the D10V.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Any symbol followed by
@word will be replaced by the symbol's value
shifted right by 2. This is used in situations such as loading a register
with the address of a function (or any other code fragment). For example, if
you want to load a register with the location of the function
jump to that function, you could do it as follws:
ldi r2, main@word jmp r2
The D10V has no hardware floating point, but the
directives generates IEEE floating-point numbers for compatibility
with other development tools.
For detailed information on the D10V machine instruction set, see
D10V Architecture: A VLIW Microprocessor for Multimedia Applications
(Mitsubishi Electric Corp.).
as implements all the standard D10V opcodes. The only changes are those
described in the section on size modifiers
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